The present invention relates to a resin sealed type semiconductor device and its mounting structure and in particular to a semiconductor device in which the external size of its package is very approximate to that of the semiconductor chip and its mounting structure.
With an advance in high integration of the semiconductor devices, a technology to provide semiconductor devices in which the size of the package for the semiconductor device is close to that of the chip has been developing. There are two approaches in this technology. One of the approaches is referred to as bare chip mounting in which a semiconductor chip is directly mounted on a printed circuit board (PCB) and is sealed with a resin.
The other approach is generally referred to as CSP (chip size package or chip scale package) in which the package which is resin sealed similarly to prior art is reduced to the size of the chip as small as possible.
A prior art structure of the CSP in which a tape with external terminals is provided on a circuit forming surface of a semiconductor chip so that a flexible material (elastomer resin) is interposed therebetween and the external terminals are electrically connected to the electrodes of the semiconductor chip is disclosed in JP-A-6-504408 (PCT Application) which was filed by Tessera Co., Ltd. Another prior art structure in which a semiconductor chip is mounted on a ceramic substrate having through-holes therein, which is provided on the side opposite to the chip with electrodes and is mounted on a PCB is disclosed in JP-A-6-224259. A further prior art structure of the CPS in which a semiconductor chip is formed on its circuit forming surface with metal wiring patterns, which are provided with external terminals is disclosed in JP-A-6-302604.